STM 90nm cells

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Contents

Analog

libraries:

  • /hom/hafliger/cds09/PH_STM09_ANALOG

Amplifiers

  • /hom/hafliger/cds09/PH_STM09_ANALOG/transamp_wide_input,
    • STATUS: layout has been successfully tested
    • PURPOSE: Wide input/ wide output transconductance amplifier originally conceived for an analog follower, rather compact, not too good matching and offset.
  • /hom/hafliger/cds09/PH_STM09_ANALOG/transamp_n_low_offset_25in_v2,
    • STATUS: layout has been successfully tested
    • PURPOSE: Transamp to be used with analog inputs that could be sensitive to added leakage. Thus, it has thick gate oxide for the input transistors with no gate leakage. Big transistors for good matching and low offsets. Rather space consuming.
  • /hom/hafliger/cds09/PH_STM09_ANALOG/transamp_n_low_offset,
    • STATUS: layout has been successfully tested
    • PURPOSE: Transamp for low offset and excellent matching. Humongous transistors with common centroids for good matching and low offsets. Extremely space consuming.

Followers

  • /hom/hafliger/cds09/PH_STM09_ANALOG/follower_power_conservative
    • STATUS: layout has been successfully tested
    • PURPOSE: A follower that can drive pads, with big, wide output transistors. To observe analog voltages without adding load to them, except for a bit of capacitance and gate leakage.

Digital

libraries:

  • /hom/hafliger/cds09/PH_STM09_DIGITAL

Logic Gates

  • /hom/hafliger/cds09/PH_STM09_DIGITAL/inverter_mini
    • STATUS: layout has been successfully tested
    • PURPOSE: inverter with minimal size transistors. Emphasis on compactness.
  • /hom/hafliger/cds09/PH_STM09_DIGITAL/nand_mini
    • STATUS: layout has been successfully tested
    • PURPOSE: nand with minimal size transistors. Emphasis on compactness.
  • /hom/hafliger/cds09/PH_STM09_DIGITAL/nor_mini
    • STATUS: layout has been successfully tested
    • PURPOSE: nor with minimal size transistors. Emphasis on compactness.


Storage

Shift Registers/Scanners

  • /hom/hafliger/cds09/PH_STM09_DIGITAL/scanner
    • STATUS: under development
    • PURPOSE: scanner cell that in an array activates cells one after the other. Needs an extra logic gate to send along a single pulse. See cells 'scanner8' and 'flash_scan' for examples on how to use it. This scanner is 'lock-up save', i.e. there is no state that will not return to normal operation automatically within a given number of clock cycles.

Mixed

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