Hspice

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Contents


Startup

If you use bash:
Put the following in the file .bashrc in your home directory:

LM_LICENSE_FILE="5370@tollheimtu.ifi.uio.no"; export LM_LICENSE_FILE

If you use csh/tcsh:
Put the following in the file .cshrc in your home directory:

setenv LM_LICENSE_FILE ${LM_LICENSE_FILE}:5370@tollheimtu.ifi.uio.no

In addition put the following the file .envir on your home directory:

setenv PATH /projects/nanos/programs/hSpice_2012_06_SP2/hspice/bin/:$PATH

Finally source the following file:

/projects/nanos/programs/hSpice_2012_06_SP2/hspice/bin/cshrc.meta

Commands

$ hspice
  • Simulation of netlists, i.e. $ hspice inverter.sp
$ hspicerf
  • Based on hspice, but with more accurate models for RF/high-speed and analog circuits
$ awaves
  • Graphical interface for plotting hspice simulation data.

Simulation with STM 90nm models

Place the text below in your hspice file to use the standard voltage threshold models for nmos and pmos transistors from the STM 90nm design kit

  • To use different corners, exchange the TT (Typical) with either FS (Fast, Slow), FF, etc.
  • To use other models, like hvt, lvt, diodes, resistors or capacitors, include the model files in the STM 90nm directory in a similar manner as below
.lib '/hom/mes/cadsoft/des_kits/stm6.1/DK_cmos090gp_7M2T_50A_6.1/DATA/HSPICE/CORNERS/mos_bsim4_svt.lib' svt_TT

.lib '/hom/mes/cadsoft/des_kits/stm6.1/DK_cmos090gp_7M2T_50A_6.1/DATA/HSPICE/CORNERS/common_polygo1.lib' PRO_TT
.lib '/hom/mes/cadsoft/des_kits/stm6.1/DK_cmos090gp_7M2T_50A_6.1/DATA/HSPICE/CORNERS/common_polygo2.lib' PRO_TT
.lib '/hom/mes/cadsoft/des_kits/stm6.1/DK_cmos090gp_7M2T_50A_6.1/DATA/HSPICE/CORNERS/common_activego1.lib' PRO_TT
.lib '/hom/mes/cadsoft/des_kits/stm6.1/DK_cmos090gp_7M2T_50A_6.1/DATA/HSPICE/CORNERS/common_activego2.lib' PRO_TT
.lib '/hom/mes/cadsoft/des_kits/stm6.1/DK_cmos090gp_7M2T_50A_6.1/DATA/HSPICE/CORNERS/common_go1.lib' PRO_TT
.lib '/hom/mes/cadsoft/des_kits/stm6.1/DK_cmos090gp_7M2T_50A_6.1/DATA/HSPICE/CORNERS/common_go2.lib' PRO_TT
.lib '/hom/mes/cadsoft/des_kits/stm6.1/DK_cmos090gp_7M2T_50A_6.1/DATA/HSPICE/CORNERS/common_passive_poly.lib' PRO_TT
.lib '/hom/mes/cadsoft/des_kits/stm6.1/DK_cmos090gp_7M2T_50A_6.1/DATA/HSPICE/CORNERS/common_passive_active.lib' PRO_TT

.model psvt pmos level=54
.model nsvt nmos level=54

Simulation with STM 65nm models

Place the text below in your hspice file to use the standard voltage threshold models for nmos and pmos transistors from the STM 65nm design kit

  • To use different corners, exchange the TT (Typical) with either FS (Fast, Slow), FF, etc.
  • To use other models, like hvt, lvt, diodes, resistors or capacitors, include the model files in the STM 65nm directory in a similar manner as below
.lib '/hom/mes/cadsoft/des_kits/cmos065_4.2.1/DK_cmos065lpgp_7m4x0y2z_50A28A_4.2.1/DATA/HSPICE/CORNERS/GPmos_bsim4_svt.lib' svtgp_TT

.lib '/hom/mes/cadsoft/des_kits/cmos065_4.2.1/DK_cmos065lpgp_7m4x0y2z_50A28A_4.2.1/DATA/HSPICE/CORNERS/common_poly_cd.lib' PRO_TT
.lib '/hom/mes/cadsoft/des_kits/cmos065_4.2.1/DK_cmos065lpgp_7m4x0y2z_50A28A_4.2.1/DATA/HSPICE/CORNERS/common_go1.lib' PRO_TT
.lib '/hom/mes/cadsoft/des_kits/cmos065_4.2.1/DK_cmos065lpgp_7m4x0y2z_50A28A_4.2.1/DATA/HSPICE/CORNERS/common_active_cd.lib' PRO_TT
.lib '/hom/mes/cadsoft/des_kits/cmos065_4.2.1/DK_cmos065lpgp_7m4x0y2z_50A28A_4.2.1/DATA/HSPICE/CORNERS/common_poly_res.lib' PRO_TT
.lib '/hom/mes/cadsoft/des_kits/cmos065_4.2.1/DK_cmos065lpgp_7m4x0y2z_50A28A_4.2.1/DATA/HSPICE/CORNERS/common_active_res.lib' PRO_TT

.model psvt pmosgp level=54
.model nsvt nmosgp level=54
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